From 48b831825cef67b217db7c1217ec2cffa58ae1f9 Mon Sep 17 00:00:00 2001
From: Forest Belton <forest@homolo.gy>
Date: Sat, 24 Jul 2021 13:38:26 -0400
Subject: [PATCH] Begin work on rotate & shift tests

---
 tests/insn/test_shift.py | 146 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 146 insertions(+)
 create mode 100644 tests/insn/test_shift.py

diff --git a/tests/insn/test_shift.py b/tests/insn/test_shift.py
new file mode 100644
index 0000000..35680d0
--- /dev/null
+++ b/tests/insn/test_shift.py
@@ -0,0 +1,146 @@
+import pytest
+
+from tests.insn.helpers import *
+
+
+def test_rlca():
+    cpu = CPU()
+    cpu.set_reg8(R8.A, 0x80)
+
+    RLCA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x01
+    assert cpu.carry == 1
+    assert cpu.cycles == 4
+
+    RLCA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x02
+    assert cpu.carry == 0
+    assert cpu.cycles == 8
+
+
+def test_rla():
+    cpu = CPU()
+    cpu.set_reg8(R8.A, 0x80)
+
+    RLA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x00
+    assert cpu.carry == 1
+    assert cpu.cycles == 4
+
+    RLA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x01
+    assert cpu.carry == 0
+    assert cpu.cycles == 8
+
+
+def test_rrca():
+    cpu = CPU()
+    cpu.set_reg8(R8.A, 0x01)
+
+    RRCA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x80
+    assert cpu.carry == 1
+    assert cpu.cycles == 4
+
+    RRCA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x40
+    assert cpu.carry == 0
+    assert cpu.cycles == 8
+
+
+def test_rra():
+    cpu = CPU()
+    cpu.set_reg8(R8.A, 0x01)
+
+    RRA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x00
+    assert cpu.carry == 1
+    assert cpu.cycles == 4
+
+    RRA().exec(cpu)
+
+    assert cpu.get_reg8(R8.A) == 0x80
+    assert cpu.carry == 0
+    assert cpu.cycles == 8
+
+
+@pytest.mark.parametrize("r", R8)
+def test_rlc_r(r):
+    cpu = CPU()
+    cpu.set_reg8(r, 0x80)
+
+    RLC_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x01
+    assert cpu.carry == 1
+    assert cpu.cycles == 8
+
+    RLC_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x02
+    assert cpu.carry == 0
+    assert cpu.cycles == 16
+
+
+@pytest.mark.parametrize("r", R8)
+def test_rl_r(r):
+    cpu = CPU()
+    cpu.set_reg8(r, 0x80)
+
+    RL_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x00
+    assert cpu.carry == 1
+    assert cpu.cycles == 8
+
+    RL_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x01
+    assert cpu.carry == 0
+    assert cpu.cycles == 16
+
+
+@pytest.mark.parametrize("r", R8)
+def test_rrc_r(r):
+    cpu = CPU()
+    cpu.set_reg8(r, 0x01)
+
+    RRC_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x80
+    assert cpu.carry == 1
+    assert cpu.cycles == 8
+
+    RRC_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x40
+    assert cpu.carry == 0
+    assert cpu.cycles == 16
+
+
+@pytest.mark.parametrize("r", R8)
+def test_rr_r(r):
+    cpu = CPU()
+    cpu.set_reg8(r, 0x01)
+
+    RR_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x00
+    assert cpu.carry == 1
+    assert cpu.cycles == 8
+
+    RR_R(r).exec(cpu)
+
+    assert cpu.get_reg8(r) == 0x80
+    assert cpu.carry == 0
+    assert cpu.cycles == 16
+
+
+# TODO: Test RLC_HL, RL_HL, RRC_HL, RR_HL