diff --git a/gbso/insn.py b/gbso/insn.py index 6c03b2b..026160c 100644 --- a/gbso/insn.py +++ b/gbso/insn.py @@ -629,6 +629,7 @@ class RLCA(Insn): a = cpu.get_reg8(R8.A) cpu.carry = (a >> 7) & 1 cpu.set_reg8(R8.A, ((a << 1) & 0xFF) | cpu.carry) + cpu.cycles += 4 def pretty(self) -> str: return "RLCA" @@ -641,6 +642,7 @@ class RLA(Insn): next_carry = (a >> 7) & 1 cpu.set_reg8(R8.A, ((a << 1) & 0xFF) | cpu.carry) cpu.carry = next_carry + cpu.cycles += 4 def pretty(self) -> str: return "RLA" @@ -652,6 +654,7 @@ class RRCA(Insn): a = cpu.get_reg8(R8.A) cpu.carry = a & 1 cpu.set_reg8(R8.A, (a >> 1) | (cpu.carry << 7)) + cpu.cycles += 4 def pretty(self) -> str: return "RRCA" @@ -664,6 +667,7 @@ class RRA(Insn): next_carry = a & 1 cpu.set_reg8(R8.A, (a >> 1) | (cpu.carry << 7)) cpu.carry = next_carry + cpu.cycles += 4 def pretty(self) -> str: return "RRA" @@ -677,6 +681,7 @@ class RLC_R(Insn): r = cpu.get_reg8(self.r) cpu.carry = (r >> 7) & 1 cpu.set_reg8(self.r, ((r << 1) & 0xFF) | cpu.carry) + cpu.cycles += 8 def pretty(self) -> str: return f"RLC {self.r.value}" @@ -688,6 +693,7 @@ class RLC_HL(Insn): hl = cpu.deref_hl() cpu.carry = (hl >> 7) & 1 cpu.deref_hl_set(((hl << 1) & 0xFF) | cpu.carry) + cpu.cycles += 16 def pretty(self) -> str: return f"RLC (HL)" @@ -702,6 +708,7 @@ class RL_R(Insn): next_carry = (r >> 7) & 1 cpu.set_reg8(self.r, ((r << 1) & 0xFF) | cpu.carry) cpu.carry = next_carry + cpu.cycles += 8 def pretty(self) -> str: return f"RL {self.r.value}" @@ -714,6 +721,7 @@ class RL_HL(Insn): next_carry = (hl >> 7) & 1 cpu.deref_hl_set(((hl << 1) & 0xFF) | cpu.carry) cpu.carry = next_carry + cpu.cycles += 16 def pretty(self) -> str: return "RL (HL)" @@ -727,6 +735,7 @@ class RRC_R(Insn): r = cpu.get_reg8(self.r) cpu.carry = r & 1 cpu.set_reg8(self.r, (r >> 1) | (cpu.carry << 7)) + cpu.cycles += 8 def pretty(self) -> str: return f"RRC {self.r.value}" @@ -738,6 +747,7 @@ class RRC_HL(Insn): hl = cpu.deref_hl() cpu.carry = hl & 1 cpu.deref_hl_set((hl >> 1) | (cpu.carry << 7)) + cpu.cycles += 16 def pretty(self) -> str: return "RRC (HL)" @@ -752,6 +762,7 @@ class RR_R(Insn): next_carry = r & 1 cpu.set_reg8(self.r, (r >> 1) | (cpu.carry << 7)) cpu.carry = next_carry + cpu.cycles += 8 def pretty(self) -> str: return f"RR {self.r.value}" @@ -764,6 +775,7 @@ class RR_HL(Insn): next_carry = hl & 1 cpu.deref_hl_set((hl >> 1) | (cpu.carry << 7)) cpu.carry = next_carry + cpu.cycles += 16 def pretty(self) -> str: return "RR (HL)" @@ -776,6 +788,7 @@ class SLA_R(Insn): def exec(self, cpu: CPU) -> None: r = cpu.get_reg8(self.r) cpu.set_reg8(self.r, (r << 1) & 0xFF) + cpu.cycles += 8 def pretty(self) -> str: return f"SLA {self.r.value}" @@ -786,6 +799,7 @@ class SLA_HL(Insn): def exec(self, cpu: CPU) -> None: hl = cpu.deref_hl() cpu.deref_hl_set((hl << 1) & 0xFF) + cpu.cycles += 16 def pretty(self) -> str: return "SLA (HL)" @@ -798,6 +812,7 @@ class SWAP_R(Insn): def exec(self, cpu: CPU) -> None: r = cpu.get_reg8(self.r) cpu.set_reg8(self.r, ((r << 4) & 0xFF) | (r >> 4)) + cpu.cycles += 8 def pretty(self) -> str: return f"SWAP {self.r.value}" @@ -808,6 +823,7 @@ class SWAP_HL(Insn): def exec(self, cpu: CPU) -> None: hl = cpu.deref_hl() cpu.deref_hl_set(((hl << 4) & 0xFF) | (hl >> 4)) + cpu.cycles += 16 def pretty(self) -> str: return "SWAP (HL)" @@ -820,6 +836,7 @@ class SRA_R(Insn): def exec(self, cpu: CPU) -> None: r = cpu.get_reg8(self.r) cpu.set_reg8(self.r, (r >> 1) | (r & (1 << 7))) + cpu.cycles += 8 def pretty(self) -> str: return f"SRA {self.r.value}" @@ -830,6 +847,7 @@ class SRA_HL(Insn): def exec(self, cpu: CPU) -> None: hl = cpu.deref_hl() cpu.deref_hl_set((hl >> 1) | (hl & (1 << 7))) + cpu.cycles += 16 def pretty(self) -> str: return "SRA (HL)" @@ -842,6 +860,7 @@ class SRL_R(Insn): def exec(self, cpu: CPU) -> None: r = cpu.get_reg8(self.r) cpu.set_reg8(self.r, r >> 1) + cpu.cycles += 8 def pretty(self) -> str: return f"SRL {self.r.value}" @@ -852,14 +871,12 @@ class SRL_HL(Insn): def exec(self, cpu: CPU) -> None: hl = cpu.deref_hl() cpu.deref_hl_set(hl >> 1) + cpu.cycles += 16 def pretty(self) -> str: return "SRL (HL)" -# TODO: Remaining rotate and shift instructions - - @dataclass class SET_N_R(Insn): n: int @@ -867,6 +884,7 @@ class SET_N_R(Insn): def exec(self, cpu: CPU) -> None: cpu.set_reg8(self.r, cpu.get_reg8(self.r) | (1 << self.n)) + cpu.cycles += 8 def pretty(self) -> str: return f"SET {self.n}, {self.r.value}" @@ -879,6 +897,7 @@ class SET_N_HL(Insn): def exec(self, cpu: CPU) -> None: hl = cpu.get_reg16(R16.HL) cpu.set_mem8(hl, cpu.get_mem8(hl) | (1 << self.n)) + cpu.cycles += 16 def pretty(self) -> str: return f"SET {self.n}, (HL)" @@ -891,6 +910,7 @@ class RES_N_R(Insn): def exec(self, cpu: CPU) -> None: cpu.set_reg8(self.r, cpu.get_reg8(self.r) & ~(1 << self.n)) + cpu.cycles += 8 def pretty(self) -> str: return f"RES {self.n}, (HL)" @@ -903,6 +923,7 @@ class RES_N_HL(Insn): def exec(self, cpu: CPU) -> None: hl = cpu.get_reg16(R16.HL) cpu.set_mem8(hl, cpu.get_mem8(hl) & ~(1 << self.n)) + cpu.cycles += 16 def pretty(self) -> str: return f"RES {self.n}, (HL)" @@ -912,6 +933,7 @@ class RES_N_HL(Insn): class CCF(Insn): def exec(self, cpu: CPU) -> None: cpu.carry = cpu.carry ^ 1 + cpu.cycles += 4 def pretty(self) -> str: return "CCF" @@ -921,6 +943,7 @@ class CCF(Insn): class SCF(Insn): def exec(self, cpu: CPU) -> None: cpu.carry = 1 + cpu.cycles += 4 def pretty(self) -> str: return "SCF"