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78 lines
2.1 KiB
78 lines
2.1 KiB
import { R8 } from "./cpu"
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import { Loc, LocType } from "../ir/loc"
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import { Operand, AbsInsn2, insnReduce2 } from "../ir/insn"
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import { BinaryOp, UnaryOp } from "../ast"
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import type { SM83Insn } from "./insn"
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import { BasicBlock } from "../ir/block"
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export const realizeBlock = (block: BasicBlock): Array<SM83Insn> => block.insns.flatMap(realizeInsn)
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export const realizeInsn = (insn: AbsInsn2): Array<SM83Insn> => insnReduce2(
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realizeCopy,
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realizeLabel,
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realizeGoto,
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realizeUnary,
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insn,
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)
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const getSourceName = (source: Operand): string => typeof source === "number"
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? source.toString()
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: source.asmName()
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export const realizeCopy = (dest: Loc, source: Operand): Array<SM83Insn> => [
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`LD ${dest.asmName()}, ${getSourceName(source)}`
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]
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export const realizeLabel = (name: string): Array<SM83Insn> => [
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`${name}:`,
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]
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export const realizeGoto = (name: string): Array<SM83Insn> => [
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`JR ${name}`,
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]
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export const realizeUnary = (dest: Loc, op: UnaryOp | BinaryOp, source: Operand): Array<SM83Insn> => {
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if (!isA(dest)) {
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throw new Error("unexpected form for unary operation")
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}
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let output: Array<SM83Insn> = []
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switch (op) {
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case "add":
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return [`ADD ${getSourceName(source)}`]
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case "subtract":
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return [`SUB ${getSourceName(source)}`]
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case "bit_and":
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return [`AND ${getSourceName(source)}`]
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case "bit_or":
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return [`OR ${getSourceName(source)}`]
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case "bit_xor":
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return [`XOR ${getSourceName(source)}`]
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case "shift_left":
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for (let i = 0; i < source; ++i) {
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output.push("SLA A")
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}
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return output
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case "shift_right":
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for (let i = 0; i < source; ++i) {
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output.push("SRL A")
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}
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return output
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case "arith_negate":
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return ["CPL", "INC A"]
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case "bit_negate":
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return ["CPL"]
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}
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}
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const isA = (loc: Operand): boolean =>
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typeof loc === "object" && loc.type === LocType.REGISTER && loc.name === R8.A
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