diff --git a/include/cpu.h b/include/cpu.h
index 564dc5c..a3c6adf 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -7,7 +7,7 @@
 #define REG_SP 29  // Stack pointer
 #define REG_FP 30  // Frame pointer
 
-#define MAIN_RAM_SIZE 0x200000
+#define MAIN_RAM_SIZE 0x200000 * 4
 #define SCRATCHPAD_BASE 0x1F800000
 #define SCRATCHPAD_END 0x1F8003FF
 #define SCRATCHPAD_SIZE (SCRATCHPAD_END - SCRATCHPAD_BASE + 1)
@@ -15,7 +15,7 @@
 typedef struct {
     uint32_t regs[32];
     uint32_t pc;
-    uint32_t main_ram[MAIN_RAM_SIZE];
+    uint8_t main_ram[MAIN_RAM_SIZE];
     uint32_t sratchpad_ram[SCRATCHPAD_SIZE];
 } cpu_t;
 
diff --git a/src/boot.c b/src/boot.c
index 3001c70..43e142e 100644
--- a/src/boot.c
+++ b/src/boot.c
@@ -79,6 +79,6 @@ void boot_psx_prgm(byte_arr_t *prgm) {
         const uint32_t insn = cpu_read32(cpu, psx.cpu->pc);
         insn_execute(cpu, insn);
 
-        psx.cpu->pc += 1;
+        psx.cpu->pc += 4;
     }
 }
diff --git a/src/cpu.c b/src/cpu.c
index 87d2baa..68f9237 100644
--- a/src/cpu.c
+++ b/src/cpu.c
@@ -23,5 +23,5 @@ void cpu_write32(cpu_t *cpu, uint32_t addr, uint32_t x) {
 uint32_t cpu_read32(cpu_t *cpu, uint32_t addr) {
     debug("Read [%08x]", addr);
     addr = translate_addr(addr);
-    return cpu->main_ram[addr];
+    return *(uint32_t *)&cpu->main_ram[addr];
 }
diff --git a/src/insn.c b/src/insn.c
index 1758719..6e86bfa 100644
--- a/src/insn.c
+++ b/src/insn.c
@@ -98,10 +98,28 @@ void insn_sll(cpu_t *cpu, uint32_t insn) {
     cpu->regs[rd] = cpu->regs[rt] << imm5;
 }
 
+void insn_beq(cpu_t *cpu, uint32_t insn) {
+    const uint8_t rs = RS(insn);
+    const uint8_t rt = RT(insn);
+    const int16_t imm = IMM(insn);
+
+    debug("BEQ %s, %s, %d", REG_NAMES[rs], REG_NAMES[rt], imm);
+    if (cpu->regs[rs] == cpu->regs[rt]) {
+        cpu->pc += imm * 4;
+    }
+}
+
+void insn_lui(cpu_t *cpu, uint32_t insn) {
+    const uint8_t rt = RT(insn);
+    const uint16_t imm = IMM(insn);
+
+    debug("LUI %s, %x", REG_NAMES[rt], imm);
+    cpu->regs[rt] = imm << 16;
+}
+
 static cpu_insn_handler primary_insn_handler[TABLE_SIZE] = {
-    [LW] = insn_lw,
-    [ADDIU] = insn_addiu,
-    [SW] = insn_sw,
+    [BEQ] = insn_beq,     [LW] = insn_lw, [LUI] = insn_lui,
+    [ADDIU] = insn_addiu, [SW] = insn_sw,
 };
 
 static cpu_insn_handler secondary_insn_handler[TABLE_SIZE] = {