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@ -22,6 +22,7 @@ class LD_R_R(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(self.dst, cpu.get_reg8(self.src)) |
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cpu.set_reg8(self.dst, cpu.get_reg8(self.src)) |
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cpu.cycles += 4 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return f"LD {self.dst}, {self.src}" |
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return f"LD {self.dst}, {self.src}" |
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@ -34,6 +35,7 @@ class LD_R_N8(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(self.dst, self.imm) |
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cpu.set_reg8(self.dst, self.imm) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return f"LD {self.dst}, {hex(self.imm)}" |
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return f"LD {self.dst}, {hex(self.imm)}" |
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@ -45,6 +47,7 @@ class LD_R_HL(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(self.dst, cpu.get_mem8(cpu.get_reg16(R16.HL))) |
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cpu.set_reg8(self.dst, cpu.get_mem8(cpu.get_reg16(R16.HL))) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return f"LD {self.dst}, (HL)" |
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return f"LD {self.dst}, (HL)" |
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@ -55,7 +58,8 @@ class LD_HL_R(Insn): |
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src: R8 |
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src: R8 |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(cpu.get_reg16(R16.HL), cpu.get_reg8(self.src)) |
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cpu.deref_hl_set(cpu.get_reg8(self.src)) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return f"LD (HL), {self.src}" |
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return f"LD (HL), {self.src}" |
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@ -67,6 +71,7 @@ class LD_HL_N(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(cpu.get_reg16(R16.HL), self.imm) |
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cpu.set_mem8(cpu.get_reg16(R16.HL), self.imm) |
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cpu.cycles += 12 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return f"LD (HL), {hex(self.imm & 0xff)}" |
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return f"LD (HL), {hex(self.imm & 0xff)}" |
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@ -76,6 +81,7 @@ class LD_HL_N(Insn): |
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class LD_A_BC(Insn): |
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class LD_A_BC(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(R8.A, cpu.get_mem8(cpu.get_reg16(R16.BC))) |
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cpu.set_reg8(R8.A, cpu.get_mem8(cpu.get_reg16(R16.BC))) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return "LD A, (BC)" |
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return "LD A, (BC)" |
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@ -85,6 +91,7 @@ class LD_A_BC(Insn): |
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class LD_A_DE(Insn): |
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class LD_A_DE(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(R8.A, cpu.get_mem8(cpu.get_reg16(R16.DE))) |
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cpu.set_reg8(R8.A, cpu.get_mem8(cpu.get_reg16(R16.DE))) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return "LD A, (DE)" |
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return "LD A, (DE)" |
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@ -96,6 +103,7 @@ class LD_A_NN(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(R8.A, cpu.get_mem8(self.nn)) |
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cpu.set_reg8(R8.A, cpu.get_mem8(self.nn)) |
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cpu.cycles += 16 |
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def pretty(self) -> str: |
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def pretty(self) -> str: |
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return f"LD A, ({hex(self.nn)})" |
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return f"LD A, ({hex(self.nn)})" |
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@ -105,12 +113,20 @@ class LD_A_NN(Insn): |
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class LD_BC_A(Insn): |
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class LD_BC_A(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(cpu.get_reg16(R16.BC), cpu.get_reg8(R8.A)) |
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cpu.set_mem8(cpu.get_reg16(R16.BC), cpu.get_reg8(R8.A)) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LD (BC), A" |
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@dataclass |
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@dataclass |
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class LD_DE_A(Insn): |
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class LD_DE_A(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(cpu.get_reg16(R16.DE), cpu.get_reg8(R8.A)) |
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cpu.set_mem8(cpu.get_reg16(R16.DE), cpu.get_reg8(R8.A)) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LD (DE), A" |
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@dataclass |
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@dataclass |
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@ -119,6 +135,10 @@ class LD_NN_A(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(self.nn, cpu.get_reg8(R8.A)) |
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cpu.set_mem8(self.nn, cpu.get_reg8(R8.A)) |
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cpu.cycles += 16 |
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def pretty(self) -> str: |
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return f"LD ({hex(self.nn)}), A" |
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@dataclass |
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@dataclass |
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@ -127,6 +147,10 @@ class LD_A_FF_N(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(R8.A, cpu.get_mem8(0xFF00 + self.n)) |
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cpu.set_reg8(R8.A, cpu.get_mem8(0xFF00 + self.n)) |
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cpu.cycles += 12 |
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def pretty(self) -> str: |
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return f"LD A, (0xFF00 + {hex(self.n)})" |
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@dataclass |
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@dataclass |
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@ -135,18 +159,30 @@ class LD_FF_N_A(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(0xFF00 + self.n, cpu.get_reg8(R8.A)) |
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cpu.set_mem8(0xFF00 + self.n, cpu.get_reg8(R8.A)) |
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cpu.cycles += 12 |
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def pretty(self) -> str: |
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return f"LD (0xFF00 + {hex(self.n)}), A" |
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@dataclass |
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@dataclass |
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class LD_A_FF_C(Insn): |
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class LD_A_FF_C(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_reg8(R8.A, cpu.get_mem8(0xFF00 + cpu.get_reg8(R8.C))) |
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cpu.set_reg8(R8.A, cpu.get_mem8(0xFF00 + cpu.get_reg8(R8.C))) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LD A, (0xFF00 + C)" |
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@dataclass |
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@dataclass |
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class LD_FF_C_A(Insn): |
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class LD_FF_C_A(Insn): |
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def exec(self, cpu: CPU) -> None: |
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def exec(self, cpu: CPU) -> None: |
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cpu.set_mem8(0xFF00 + cpu.get_reg8(R8.C), cpu.get_reg8(R8.A)) |
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cpu.set_mem8(0xFF00 + cpu.get_reg8(R8.C), cpu.get_reg8(R8.A)) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LD (0xFF00 + C), A" |
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@dataclass |
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@dataclass |
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@ -155,6 +191,10 @@ class LDI_HL_A(Insn): |
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hl = cpu.get_reg16(R16.HL) |
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hl = cpu.get_reg16(R16.HL) |
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cpu.set_mem8(hl, cpu.get_reg8(R8.A)) |
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cpu.set_mem8(hl, cpu.get_reg8(R8.A)) |
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cpu.set_reg16(R16.HL, hl + 1) |
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cpu.set_reg16(R16.HL, hl + 1) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LDI (HL), A" |
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@dataclass |
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@dataclass |
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@ -163,6 +203,10 @@ class LDI_A_HL(Insn): |
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hl = cpu.get_reg16(R16.HL) |
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hl = cpu.get_reg16(R16.HL) |
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cpu.set_reg8(R8.A, cpu.get_mem8(hl)) |
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cpu.set_reg8(R8.A, cpu.get_mem8(hl)) |
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cpu.set_reg16(R16.HL, hl + 1) |
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cpu.set_reg16(R16.HL, hl + 1) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LDI A, (HL)" |
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@dataclass |
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@dataclass |
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@ -171,6 +215,10 @@ class LDD_HL_A(Insn): |
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hl = cpu.get_reg16(R16.HL) |
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hl = cpu.get_reg16(R16.HL) |
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cpu.set_mem8(hl, cpu.get_reg8(R8.A)) |
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cpu.set_mem8(hl, cpu.get_reg8(R8.A)) |
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cpu.set_reg16(R16.HL, hl - 1) |
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cpu.set_reg16(R16.HL, hl - 1) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LDD (HL), A" |
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@dataclass |
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@dataclass |
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@ -179,6 +227,10 @@ class LDD_A_HL(Insn): |
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hl = cpu.get_reg16(R16.HL) |
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hl = cpu.get_reg16(R16.HL) |
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cpu.set_reg8(R8.A, cpu.get_mem8(hl)) |
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cpu.set_reg8(R8.A, cpu.get_mem8(hl)) |
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cpu.set_reg16(R16.HL, hl - 1) |
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cpu.set_reg16(R16.HL, hl - 1) |
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cpu.cycles += 8 |
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def pretty(self) -> str: |
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return "LDD A, (HL)" |
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@dataclass |
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@dataclass |
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