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@ -9,22 +9,31 @@ |
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static cpu_insn_handler primary_insn_handler[TABLE_SIZE] = {NULL}; |
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static cpu_insn_handler primary_insn_handler[TABLE_SIZE] = {NULL}; |
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static cpu_insn_handler secondary_insn_handler[TABLE_SIZE] = {NULL}; |
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static cpu_insn_handler secondary_insn_handler[TABLE_SIZE] = {NULL}; |
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void insn_execute(cpu_t *cpu, uint32_t insn) { |
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const op_primary_t op = extract_primary_op(insn); |
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static inline op_primary_t extract_primary_op(uint32_t insn) { |
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return (insn >> 26) & 0x3f; |
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} |
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static inline op_secondary_t extract_secondary_op(uint32_t insn) { |
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return (insn >> 0) & 0x3f; |
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} |
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void insn_execute(cpu_t *cpu, uint32_t raw_insn) { |
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const op_primary_t op = extract_primary_op(raw_insn); |
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const insn_t insn = *(insn_t *)&raw_insn; |
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if (op == SPECIAL) { |
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if (op == SPECIAL) { |
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const op_secondary_t op2 = extract_secondary_op(insn); |
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const op_secondary_t op2 = extract_secondary_op(raw_insn); |
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if (op2 > TABLE_SIZE || secondary_insn_handler[op2] == NULL) { |
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if (op2 > TABLE_SIZE || secondary_insn_handler[op2] == NULL) { |
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fatal("unsupported instruction: insn=%08x, op=%02x, op2=%02x", insn, op, |
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op2); |
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fatal("unsupported instruction: insn=%08x, op=%02x, op2=%02x", raw_insn, |
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op, op2); |
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} |
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} |
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secondary_insn_handler[op2](cpu, insn); |
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secondary_insn_handler[op2](cpu, insn); |
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} |
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} |
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if (op > TABLE_SIZE || primary_insn_handler[op] == NULL) { |
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if (op > TABLE_SIZE || primary_insn_handler[op] == NULL) { |
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fatal("unsupported instruction: insn=%08x, op=%02x", insn, op); |
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fatal("unsupported instruction: insn=%08x, op=%02x", raw_insn, op); |
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} |
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} |
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primary_insn_handler[op](cpu, insn); |
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primary_insn_handler[op](cpu, insn); |
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