|
|
@ -9,22 +9,31 @@ |
|
|
|
static cpu_insn_handler primary_insn_handler[TABLE_SIZE] = {NULL}; |
|
|
|
static cpu_insn_handler secondary_insn_handler[TABLE_SIZE] = {NULL}; |
|
|
|
|
|
|
|
void insn_execute(cpu_t *cpu, uint32_t insn) { |
|
|
|
const op_primary_t op = extract_primary_op(insn); |
|
|
|
static inline op_primary_t extract_primary_op(uint32_t insn) { |
|
|
|
return (insn >> 26) & 0x3f; |
|
|
|
} |
|
|
|
|
|
|
|
static inline op_secondary_t extract_secondary_op(uint32_t insn) { |
|
|
|
return (insn >> 0) & 0x3f; |
|
|
|
} |
|
|
|
|
|
|
|
void insn_execute(cpu_t *cpu, uint32_t raw_insn) { |
|
|
|
const op_primary_t op = extract_primary_op(raw_insn); |
|
|
|
const insn_t insn = *(insn_t *)&raw_insn; |
|
|
|
|
|
|
|
if (op == SPECIAL) { |
|
|
|
const op_secondary_t op2 = extract_secondary_op(insn); |
|
|
|
const op_secondary_t op2 = extract_secondary_op(raw_insn); |
|
|
|
|
|
|
|
if (op2 > TABLE_SIZE || secondary_insn_handler[op2] == NULL) { |
|
|
|
fatal("unsupported instruction: insn=%08x, op=%02x, op2=%02x", insn, op, |
|
|
|
op2); |
|
|
|
fatal("unsupported instruction: insn=%08x, op=%02x, op2=%02x", raw_insn, |
|
|
|
op, op2); |
|
|
|
} |
|
|
|
|
|
|
|
secondary_insn_handler[op2](cpu, insn); |
|
|
|
} |
|
|
|
|
|
|
|
if (op > TABLE_SIZE || primary_insn_handler[op] == NULL) { |
|
|
|
fatal("unsupported instruction: insn=%08x, op=%02x", insn, op); |
|
|
|
fatal("unsupported instruction: insn=%08x, op=%02x", raw_insn, op); |
|
|
|
} |
|
|
|
|
|
|
|
primary_insn_handler[op](cpu, insn); |
|
|
|